Device and methods for electrostatic discharge protection in CMOS/BiCMOS mixed signal integrated circuits, with operating input and output voltages higher/lower than the power supply voltage
UCF scientists have developed an innovative device for electrostatic discharge (ESD) protection of advanced complementary metal oxide semiconductor (CMOS) and bipolar CMOS (BiCMOS) technologies. The device and methodologies developed use a dual polarity trigger which greatly improves the voltage carrying potential (several times below and above the power supply voltage) of devices.
The performance and reliability of integrated circuits (IC) are adversely affected by ESD induced between the semi-conductor chips and other objects. A variety of ESD protection techniques have been developed. However, most of these techniques do not address ESD in complementary CMOS or BiCMOS technologies. The ESD problem is further heightened in high performance, dense ICs. These discharges degrade small chip performance and diminish the potential advantages of down scaling. The limitations of standard ESD protection techniques with regard to advanced ICs can be overcome, however, by designing devices with high conductivity. One such type of device is the Silicon Controlled Rectifier (SCR). Guard rings have also been used for ESD protection in dual polarity devices. Unfortunately, they limit the range of voltage that the device can handle.
Provides a high level of immunity to electrostatic discharge for advanced CMOS/BiCMOS Dual polarity trigger Scalable Enables current electrostatic discharge devices to be incorporated into CMOS/BiCMOS technologies
- IC for electronics such as:
- Data communication transceivers
- Industrial control devices
- Distributive medical communication
- Mixed-signal semiconductor integrated circuits
Additional Technology Numbers: 31488, 32141